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龙梦Fedora自带的GCC版本和target-help信息
2020-02-02 3439 0
版本是 8.1，但似乎不支持 gs464e 和 gs464v。
先放一个很好的 gcc 参数说明文档：https://blog.csdn.net/liuchao1986105/article/details/6674822
gcc -v 使用内建 specs。 COLLECT_GCC=gcc COLLECT_LTO_WRAPPER=/usr/libexec/gcc/mips64el-redhat-linux/8/lto-wrapper 目标：mips64el-redhat-linux 配置为：../configure --enable-bootstrap --enable-languages=c,c++,objc,obj-c++ ,fortran,go,lto --prefix=/usr --mandir=/usr/share/man --infodir=/usr/share/in fo --with-bugurl=http://bugzilla.redhat.com/bugzilla --enable-shared --enable -threads=posix --enable-checking=release --enable-multilib --with-system-zlib --enable-__cxa_atexit --disable-libunwind-exceptions --enable-gnu-unique-obj ect --enable-linker-build-id --with-gcc-major-version-only --with-linker-hash -style=both --enable-plugin --enable-initfini-array --with-isl --disable-libm px --enable-gnu-indirect-function --with-long-double-128 --with-arch=mips64r2 --with-abi=64 --build=mips64el-redhat-linux 线程模型：posix gcc 版本 8.1.0 20180502 (Red Hat 8.1.0-0.21) (GCC)
gcc --target-help 下列选项与特定目标机相关: -G<number> Put global and static data smaller than <number> bytes into a special section (on some targets). -mabi=ABI Generate code that conforms to the given ABI. -mabicalls Generate code that can be used in SVR4-style dynamic objects. -mabs=MODE Select the IEEE 754 ABS/NEG instruction execution mode. -mandroid 为 Android 操作系统生成代码。 -march=ISA Generate code for the given ISA. -mbionic Use Bionic C library. -mbranch-cost=COST Set the cost of branches to roughly COST instructions. -mbranch-likely Use Branch Likely instructions, overriding the architecture default. -mcheck-zero-division Trap on integer divide by zero. -mcode-readable=SETTING Specify when instructions are allowed to access code. -mcompact-branches= Specify the compact branch usage policy. -mdivide-breaks Use branch-and-break sequences to check for integer divide by zero. -mdivide-traps Use trap instructions to check for integer divide by zero. -mdmx Allow the use of MDMX instructions. -mdouble-float Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations. -mdsp Use MIPS-DSP instructions. -mdspr2 Use MIPS-DSP REV 2 instructions. -meb 令大端在前。 -mel 令小端在前。 -membedded-data Use ROM instead of RAM. -meva Use Enhanced Virtual Addressing instructions. -mexplicit-relocs Use NewABI-style %reloc() assembly operators. -mextern-sdata Use -G for data that is not defined by the current object. -mfix-24k Work around certain 24K errata. -mfix-r10000 Work around certain R10000 errata. -mfix-r4000 Work around certain R4000 errata. -mfix-r4400 Work around certain R4400 errata. -mfix-rm7000 Work around certain RM7000 errata. -mfix-sb1 Work around errata for early SB-1 revision 2 cores. -mfix-vr4120 Work around certain VR4120 errata. -mfix-vr4130 Work around VR4130 mflo/mfhi errata. -mfix4300 Work around an early 4300 hardware bug. -mflip-mips16 Switch on/off MIPS16 ASE on alternating functions for compiler testing. -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines. -mfp-exceptions FP exceptions are enabled. -mfp32 Use 32-bit floating-point registers. -mfp64 Use 64-bit floating-point registers. -mfpxx Conform to the o32 FPXX ABI. -mframe-header-opt Optimize frame header. -mglibc Use GNU C library. -mgp32 Use 32-bit general registers. -mgp64 Use 64-bit general registers. -mgpopt Use GP-relative addressing to access small data. -mgs464-func-save-restore-reg Use gss<l>q[c1] instructions for save and restore reg in functions prologue and epilogue -mhard-float Allow the use of hardware floating-point ABI and instructions. -mimadd Use integer madd/msub instructions. -minterlink-compressed Generate code that is link-compatible with MIPS16 and microMIPS code. -minterlink-mips16 An alias for minterlink-compressed provided for backward-compatibility. -mipsN Generate code for ISA level N. -mips16 Generate MIPS16 code. -mips3d Use MIPS-3D instructions. -mllsc Use ll, sc and sync instructions. -mload-store-pairs Enable load/store bonding. -mlocal-sdata Use -G for object-local data. -mlong-calls Use indirect calls. -mlong32 Use a 32-bit long type. -mlong64 Use a 64-bit long type. -mlra Use LRA instead of reload. -mlxc1-sxc1 Use lwxc1/swxc1/ldxc1/sdxc1 instructions where applicable. -mmad Use PMC-style 'mad' instructions. -mmadd4 Use 4-operand madd.s/madd.d and related instructions where applicable. -mmcount-ra-address Pass the address of the ra save location to _mcount in $12. -mmcu Use MCU instructions. -mmemcpy Don't optimize block moves. -mmicromips Use microMIPS instructions. -mmsa Use MIPS MSA Extension instructions. -mmt Allow the use of MT instructions. -mmusl Use musl C library. -mnan=ENCODING Select the IEEE 754 NaN data encoding. -mno-flush-func Do not use a cache-flushing function before calling stack trampolines. -mno-mdmx Do not use MDMX instructions. -mno-mips16 Generate normal-mode code. -mno-mips3d Do not use MIPS-3D instructions. -modd-spreg Enable use of odd-numbered single-precision registers. -mpaired-single Use paired-single floating-point instructions. -mplt When generating -mabicalls code, allow executables to use PLTs and copy relocations. -mr10k-cache-barrier=SETTING Specify when r10k cache barriers should be inserted. -mrelax-pic-calls Try to allow the linker to turn PIC calls into direct calls. -mshared When generating -mabicalls code, make the code suitable for use in shared libraries. -msingle-float Restrict the use of hardware floating-point instructions to 32-bit operations. -msmartmips Use SmartMIPS instructions. -msoft-float Prevent the use of all hardware floating-point instructions. -msplit-addresses Optimize lui/addiu address loads. -msym32 Assume all symbols have 32-bit values. -msynci Use synci instruction to invalidate i-cache. -mtune=PROCESSOR Optimize the output for PROCESSOR. -muclibc Use uClibc C library. -muninit-const-in-rodata Put uninitialized constants in ROM (needs -membedded-data). -mvirt Use Virtualization (VZ) instructions. -mvr4130-align Perform VR4130-specific alignment optimizations. -mxgot Lift restrictions on GOT size. -mxpa Use eXtended Physical Address (XPA) instructions. 已知 MIPS ABI (用于 -mabi= 选项)： 32 64 eabi n32 o64 已知 MIPS 处理器 (用于 -march= 和 -mtune= 选项)： 10000 1004kc 1004kf 1004kf1_1 1004kf2_1 10k 12000 12k 14000 14k 16000 16k 2000 20kc 24kc 24kec 24kef 24kef1_1 24kef2_1 24kefx 24kex 24kf 24kf1_1 24kf2_1 24kfx 24kx 2k 3000 34kc 34kf 34kf1_1 34kf2_1 34kfx 34kn 34kx 3900 3k 4000 4100 4111 4120 4130 4300 4400 4600 4650 4700 4k 4kc 4kec 4kem 4kep 4km 4kp 4ksc 4ksd 5000 5400 5500 5900 5k 5kc 5kf 6000 6k 7000 74kc 74kf 74kf1_1 74kf2_1 74kf3_2 74kfx 74kx 7k 8000 8k 9000 9k from-abi i6400 interaptiv loongson2e loongson2f loongson3a m14k m14kc m14ke m14kec m4k m5100 m5101 mips1 mips2 mips3 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips4 mips64 mips64r2 mips64r3 mips64r5 mips64r6 native octeon octeon+ octeon2 octeon3 orion p5600 r10000 r1004kc r1004kf r1004kf1_1 r1004kf2_1 r10k r12000 r12k r14000 r14k r16000 r16k r2000 r20kc r24kc r24kec r24kef r24kef1_1 r24kef2_1 r24kefx r24kex r24kf r24kf1_1 r24kf2_1 r24kfx r24kx r2k r3000 r34kc r34kf r34kf1_1 r34kf2_1 r34kfx r34kn r34kx r3900 r3k r4000 r4100 r4111 r4120 r4130 r4300 r4400 r4600 r4650 r4700 r4k r4kc r4kec r4kem r4kep r4km r4kp r4ksc r4ksd r5000 r5400 r5500 r5900 r5k r5kc r5kf r6000 r6k r7000 r74kc r74kf r74kf1_1 r74kf2_1 r74kf3_2 r74kfx r74kx r7k r8000 r8k r9000 r9k rm7000 rm7k rm9000 rm9k sb1 sb1a sr71000 sr71k vr4100 vr4111 vr4120 vr4130 vr4300 vr5000 vr5400 vr5500 vr5k xlp xlr Policies available for use with -mcompact-branches=: always never optimal -mcode-readable= 的有效参数为： no pcrel yes 已知 MIPS IEEE 754 设置 (用于 -march= 和 -mtune= 选项)： 2008 legacy 已知 MIPS ISA 等级 (用于 -mips 选项)： 1 2 3 32 32r2 32r3 32r5 32r6 4 64 64r2 64r3 64r5 64r6 -m10k-cache-barrier= 的有效参数为： load-store none store 汇编器选项 ========= 使用“-Wa,选项”将“选项”传递给汇编器。 MIPS options: -EB generate big endian output -EL generate little endian output -g, -g2 do not remove unneeded NOPs or swap branches -G NUM allow referencing objects up to NUM bytes implicitly with the gp register [default 8] -mips1 generate MIPS ISA I instructions -mips2 generate MIPS ISA II instructions -mips3 generate MIPS ISA III instructions -mips4 generate MIPS ISA IV instructions -mips5 generate MIPS ISA V instructions -mips32 generate MIPS32 ISA instructions -mips32r2 generate MIPS32 release 2 ISA instructions -mips32r3 generate MIPS32 release 3 ISA instructions -mips32r5 generate MIPS32 release 5 ISA instructions -mips32r6 generate MIPS32 release 6 ISA instructions -mips64 generate MIPS64 ISA instructions -mips64r2 generate MIPS64 release 2 ISA instructions -mips64r3 generate MIPS64 release 3 ISA instructions -mips64r5 generate MIPS64 release 5 ISA instructions -mips64r6 generate MIPS64 release 6 ISA instructions -march=CPU/-mtune=CPU generate code/schedule for CPU, where CPU is one of: mips1, mips2, mips3, mips4, mips5, mips32, mips32r2, mips32r3, mips32r5, mips32r6, mips64, mips64r2, mips64r3, mips64r5, mips64r6, r3000, r2000, r3900, r6000, r4000, r4010, vr4100, vr4111, vr4120, vr4130, vr4181, vr4300, r4400, r4600, orion, r4650, r5900, loongson2e, loongson2f, r8000, r10000, r12000, r14000, r16000, vr5000, vr5400, vr5500, rm5200, rm5230, rm5231, rm5261, rm5721, rm7000, rm9000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem, 4kep, 4ksd, m4k, m4kp, m14k, m14kc, m14ke, m14kec, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kfx, 24kx, 24kec, 24kef2_1, 24kef, 24kef1_1, 24kefx, 24kex, 34kc, 34kf2_1, 34kf, 34kf1_1, 34kfx, 34kx, 34kn, 74kc, 74kf2_1, 74kf, 74kf1_1, 74kf3_2, 74kfx, 74kx, 1004kc, 1004kf2_1, 1004kf, 1004kf1_1, interaptiv, interaptiv-mr2, m5100, m5101, p5600, 5kc, 5kf, 20kc, 25kf, sb1, sb1a, loongson3a, octeon, octeon+, octeon2, octeon3, xlr, xlp, i6400, p6600, from-abi -mCPU equivalent to -march=CPU -mtune=CPU. Deprecated. -no-mCPU don't generate code specific to CPU. For -mCPU and -no-mCPU, CPU must be one of: 3900, 4010, 4100, 4650 -mips16 generate mips16 instructions -no-mips16 do not generate mips16 instructions -mmicromips generate microMIPS instructions -mno-micromips do not generate microMIPS instructions -msmartmips generate smartmips instructions -mno-smartmips do not generate smartmips instructions -mdsp generate DSP instructions -mno-dsp do not generate DSP instructions -mdspr2 generate DSP R2 instructions -mno-dspr2 do not generate DSP R2 instructions -mdspr3 generate DSP R3 instructions -mno-dspr3 do not generate DSP R3 instructions -mmt generate MT instructions -mno-mt do not generate MT instructions -mmcu generate MCU instructions -mno-mcu do not generate MCU instructions -mmsa generate MSA instructions -mno-msa do not generate MSA instructions -mxpa generate eXtended Physical Address (XPA) instructions -mno-xpa do not generate eXtended Physical Address (XPA) instr uctions -mvirt generate Virtualization instructions -mno-virt do not generate Virtualization instructions -minsn32 only generate 32-bit microMIPS instructions -mno-insn32 generate all microMIPS instructions -mfix-loongson2f-jump work around Loongson2F JUMP instructions -mfix-loongson2f-nop work around Loongson2F NOP errata -mfix-vr4120 work around certain VR4120 errata -mfix-vr4130 work around VR4130 mflo/mfhi errata -mfix-24k insert a nop after ERET and DERET instructions -mfix-cn63xxp1 work around CN63XXP1 PREF errata -mgp32 use 32-bit GPRs, regardless of the chosen ISA -mfp32 use 32-bit FPRs, regardless of the chosen ISA -msym32 assume all symbols have 32-bit values -O0 remove unneeded NOPs, do not swap branches -O remove unneeded NOPs and swap branches --trap, --no-break trap exception on div by 0 and mult overflow --break, --no-trap break exception on div by 0 and mult overflow -mhard-float allow floating-point instructions -msoft-float do not allow floating-point instructions -msingle-float only allow 32-bit floating-point operations -mdouble-float allow 32-bit and 64-bit floating-point operations --[no-]construct-floats [dis]allow floating point values to be constructed --[no-]relax-branch [dis]allow out-of-range branches to be relaxed -mignore-branch-isa accept invalid branches requiring an ISA mode switch -mno-ignore-branch-isa reject invalid branches requiring an ISA mode switch -mnan=ENCODING select an IEEE 754 NaN encoding convention, either of : legacy, 2008 -KPIC, -call_shared generate SVR4 position independent code -call_nonpic generate non-PIC code that can operate with DSOs -mvxworks-pic generate VxWorks position independent code -non_shared do not generate code that can operate with DSOs -xgot assume a 32 bit GOT -mpdr, -mno-pdr enable/disable creation of .pdr sections -mshared, -mno-shared disable/enable .cpload optimization for position dependent (non shared) code -mabi=ABI create ABI conformant object file for: 32, o64, n32, 64, eabi -32 create o32 ABI object file (default) -n32 create n32 ABI object file -64 create 64 ABI object file 链接器选项 ========= 使用“-Wl,选项”将“选项”传递给链接器。 elf64ltsmip: --insn32 Only generate 32-bit microMIPS instructions --no-insn32 Generate all microMIPS instructions --ignore-branch-isa Accept invalid branch relocations requiring an ISA mode switch --no-ignore-branch-isa Reject invalid branch relocations requiring an ISA mode switch elf32ltsmipn32: --insn32 Only generate 32-bit microMIPS instructions --no-insn32 Generate all microMIPS instructions --ignore-branch-isa Accept invalid branch relocations requiring an ISA mode switch --no-ignore-branch-isa Reject invalid branch relocations requiring an ISA mode switch elf32ltsmip: --insn32 Only generate 32-bit microMIPS instructions --no-insn32 Generate all microMIPS instructions --ignore-branch-isa Accept invalid branch relocations requiring an ISA mode switch --no-ignore-branch-isa Reject invalid branch relocations requiring an ISA mode switch elf32btsmipn32: --insn32 Only generate 32-bit microMIPS instructions --no-insn32 Generate all microMIPS instructions --ignore-branch-isa Accept invalid branch relocations requiring an ISA mode switch --no-ignore-branch-isa Reject invalid branch relocations requiring an ISA mode switch elf32btsmip: --insn32 Only generate 32-bit microMIPS instructions --no-insn32 Generate all microMIPS instructions --ignore-branch-isa Accept invalid branch relocations requiring an ISA mode switch --no-ignore-branch-isa Reject invalid branch relocations requiring an ISA mode switch elf64btsmip: --insn32 Only generate 32-bit microMIPS instructions --no-insn32 Generate all microMIPS instructions --ignore-branch-isa Accept invalid branch relocations requiring an ISA mode switch --no-ignore-branch-isa Reject invalid branch relocations requiring an ISA mode switch
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